Design of low voltage high performance, wide bandwidth current feedback amplifier with complementary input pair

Abstract

This thesis presents the work done on the design of a low voltage high performance, wide bandwidth current feedback amplifier [CFA] with complementary input pair. The design is carried out in 1.8 V, 0.18 micron CMOS process. The design uses the cascaded voltage follower configuration that improves the bandwidth of the amplifier and to get almost rail-to-rail input swing capability, parallel NMOS and PMOS differential pairs are used with current addition.

Thus proposed current feedback amplifier combines the advantages of both the design. It provides wide bandwidth and simultaneously increases the input voltage range. It also provides low power consumption and high transimpedance.

Simulation results show that the closed loop bandwidth for unity gain noninverting configuration is 458 MHz and the input voltage range is from –0.8 to 0.35 V, for supply voltages ranging from +0.9 to –0.9 V. The amplifier performance is also evaluated to see the gain bandwidth independence effect. This CFA provides almost gain independent closed loop bandwidth, which depends on the value of feedback resistor.